Over sampled analog-to-digital converters have been realized with analog modulators utilizing delta-sigma conversion. The analog-to-digital converter consists generally of a delta-sigma modulator and a digital filter. The delta-sigma modulator has a low resolution quantizer embedded therein, around which frequency dependent feedback is applied by means of a digital-to-analog converter and an analog filter. The analog input is summed into the modulator loop at a point where, for frequencies with high loop gain, the output of the DAC will be substantially equal to the input.
Since the quantizer is generally non-linear, exact analysis of the loop parameters is difficult. Typically, it is desirable in the design of a delta-sigma modulator to reduce quantization noise, which can be achieved by the selection of a transfer function for the overall modulator that possesses high in-band gain and high out-of-band attenuation, thereby shaping the quantization noise spectrum advantageously.
The filter function is normally realized with at least one integrator and sometimes a cascade of two integrators, the cascade of two integrators providing a "second order" filter, which second order filter more effectively shifts quantization noise to out-of-band frequencies. Extension to higher order filters, although improving the quantization noise, has substantially more stability problems associated therewith. These higher order filters are generally only conditionally stable due to the existence of a high phase shift at baseband frequencies. Conditionally stable loops can become unstable if a frequency independent gain parameter in the loop is reduced. The effective quantizer gain is such a parameter and this gain is subject to change under varying operating conditions. As such, stability of modulators with third and higher order filters is at risk. Nevertheless, the attractiveness of higher order filters has led to a number of solutions to the stability problems.
Stability problems can exist in higher order modulators and as a result of large DC or high frequency inputs during power-up or other system transients. One solution that has been proposed to solve this problem is that illustrated and disclosed in U.S. Pat. No. 4,509,037, issued to Harris. Harris discloses a clipper circuit which is disposed between the input and the output of one of the integration stages in the higher order modulator which, when large signals are present, shorts out the integrator to basically change the poles and zeroes of the filter function. However, this type of system has some problems in that it is unknown exactly what changes occur at clipping due to the non-linearities of the diodes utilized in the clipping circuit and also the length of time required for the modulator to settle back to its normal operating condition. There therefore exists the need for an improved oscillation detection and reset circuit.